MediaTek
Role in each timeline
- Custom AI Silicon at the Hyperscalers: TPU, Trainium, Maia, MTIA and the OpenAI–Broadcom Chip
Reportedly became Google’s second TPU design partner, though later disclosures make its precise role in TPU 8i unclear.
- Nvidia's Dealmaking: From Mellanox and the Failed Arm Bid to Groq and Hugging Face
Chip designer that received a $3.5 billion Nvidia investment in convertible bonds.
MediaTek across every timeline
Every dated entry that names MediaTek, from all 2 timelines, newest first.
20262 entries
- NVIDIA invests $3.5 billion in MediaTek convertible bonds Financial
NVIDIA invested $3.5 billion in convertible bonds issued by MediaTek. NVIDIA and MediaTek expanded their collaboration on AI infrastructure, local computing and automotive systems. MediaTek agreed to adopt NVIDIA NVLink Fusion as an option for customers developing custom XPUs for NVIDIA-connected rack-scale AI factories.
on Nvidia's Dealmaking: From Mellanox and the Failed Arm Bid to Groq and Hugging Face - Cloud Next: Ironwood for everyone, and an eighth generation split into TPU 8t for training and TPU 8i for inference Launch
Google previewed its first two-chip TPU generation: 8t for large-scale training and 8i for low-latency agentic inference, with general availability promised for later in 2026 for the first parts. Reports identified Broadcom as the design partner on 8t and MediaTek on 8i, both on TSMC 2nm, and Broadcom later said Anthropic would take 5 GW of 8i in 2027.
on Custom AI Silicon at the Hyperscalers: TPU, Trainium, Maia, MTIA and the OpenAI–Broadcom Chip
20251 entry
- Reuters: Google is preparing a second TPU design partner, MediaTek, for a chip to be built in 2026 Report
Reuters, citing The Information, reported that Google was preparing to work with MediaTek on a next-generation TPU expected to be manufactured in 2026, alongside its long-standing Broadcom partnership. Google, MediaTek and Broadcom did not comment. The two-partner split later surfaced as TPU 8t from Broadcom and TPU 8i from MediaTek.
on Custom AI Silicon at the Hyperscalers: TPU, Trainium, Maia, MTIA and the OpenAI–Broadcom Chip